[ale] "per-process virtual address space" limit only for x86 architecture?

[Michael B. Trausch]

On Mon, 2008-07-28 at 15:46 -0600, JK wrote:
> Do the 64-bit archs support bigger pages than 4MiB?  Even on x86-32
> with PAE, a fully-decked-out (64G) server was using a huge chunk of
> kernelspace just for pagetables and the physical page bookkeeping.
> I'd expect that would definitely have to change when squaring the
> address space.

On the IA-32, there are 4 KiB and 4 MiB page sizes [1]; on the x86-64,
in Long Mode, you can have page size that are 4 KiB, 2 MiB, or 1 GiB
[2].  Not sure why 4 MiB seems to be missing from the x86-64
architecture, but it is supported in Legacy Mode and probably
Compatibility Mode, I should hope, or 32-bit software that uses a 4 MiB
page size wouldn't run.  :)

	--- Mike

[1] http://www.cse.unsw.edu.au/~cs9244/06/seminars/06-nfd.pdf
[2] http://en.wikipedia.org/wiki/X86-64#Virtual_address_space_details

-- 
My sigfile ran away and is on hiatus.
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