[ale] 16

Thu Jan 9 08:45:26 EST 1997

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Vernard Martin wrote:
>

> The pentium pro can execute instructions out of order versus the
pentium
> which requires that the compiler do that optimization. In addition,
the P6
> is simply built over better Tech (both hardware and in design) than
the P5
> so it *should* be a better chip. And the things still a CISC chip. The
only
> real competition is the HP PA-RISC and the DEC Alpha. And the DEC
alpha
> only gets its true performance by running at really high clock speeds.
>
> V
> --
> Vernard Martin (vernard at cc.gatech.edu)
www.cc.gatech.edu/people/home/vernard/

The Pentium Pro has a RISC core.  It is a De-Coupled CPU (It breaks down
X86 instructions into fixed RISC instructions which it can then perform
all its
tricks ( Data Depenency Removal, Mulibranch Prediction along with other
RISC techniques.)  It can dispatch up to 4 instructions per SYSCLK.

Exponential Technology Introduced a 500+ MHz version of the PowerPC
chip.  This should kill the Pentium Pro on Linux.  They achieved this
using
fast bipolar transistors instead of the CMOS/Bi-CMOS process.

AMD is preparing their K6 which supposedely should step all over the
Pentium
Pro.  And the good news is that it runs in a standard Pentium Socket7.
L1
cache is 64K as opposed to 16K in the P6.

/usr/bin/andy.

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<DT>Vernard Martin wrote:<BR>
> <BR>
 <BR>
> The pentium pro can execute instructions out of order versus the pentium<BR>
> which requires that the compiler do that optimization. In addition,
the P6<BR>
> is simply built over better Tech (both hardware and in design) than
the P5<BR>
> so it *should* be a better chip. And the things still a CISC chip.
The only<BR>
> real competition is the HP PA-RISC and the DEC Alpha. And the DEC
alpha<BR>
> only gets its true performance by running at really high clock speeds.<BR>
> <BR>
> V<BR>
> --<BR>
> Vernard Martin (vernard at cc.gatech.edu) www.cc.gatech.edu/people/home/vernard/<BR>
 </DT>

<DT>The Pentium Pro has a RISC core.  It is a De-Coupled CPU (It breaks
down</DT>

<DT>X86 instructions into fixed RISC instructions which it can then
perform all its</DT>

<DT>tricks ( Data Depenency Removal, Mulibranch Prediction along with other </DT>

<DT>RISC techniques.)  It can dispatch up to 4 instructions per SYSCLK.  </DT>

<DT> </DT>

<DT>Exponential Technology Introduced a 500+ MHz version of the PowerPC</DT>

<DT>chip.  This should kill the Pentium Pro on Linux.  They achieved
this using</DT>

<DT>fast bipolar transistors instead of the CMOS/Bi-CMOS process. </DT>

<DT> </DT>

<DT>AMD is preparing their K6 which supposedely should step all over the
Pentium</DT>

<DT>Pro.  And the good news is that it runs in a standard Pentium
Socket7.  L1</DT>

<DT>cache is 64K as opposed to 16K in the P6. </DT>

<DT> </DT>

<DT> </DT>

<DT>/usr/bin/andy.</DT>

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